A new way of doing things.
Non-Von has designed, fabbed, and deployed a new chip architecture that significantly increases processing power while dramatically reducing electrical consumption. The system works on any AI model, including all common development packages, and especially outperforms on the latest efficiency-focused models.
This new chip architecture, Non-Von's novo, enables dramatic improvements across the pain points for today's AI inference:
We removed the monolithic memory.
Put simply, we entirely removed the traditional monolithic (von Neumann) memory and caches, and instead paired each core with its own memory. This eliminates any memory bottleneck and radically cuts the required power budget.
Of course, there is a lot of patent-protected design going on under the hood to make all this work. We're keeping many of the details under wraps for now — for more, contact us.
Traditional von Neumann memory vs. Non-Von's per-core memory.
Datacenter throughput, edge-device power.
In 2024 we fabricated the proof-of-concept chip, Non-Von's novo1, and demonstrated it in a fielded commercial product, processing data at the edge. The far more advanced novo2 is planned for the end of 2026. See Hokenmaier et al. 2024 for an example paper describing our work.
novo1 today, novo2 next.
* novo2 figures are simulated based on the real performance of novo1.
Memory bandwidth (GB/s) vs. competitors.
Peak power (mW) vs. competitors.
The throughput of a data center, at the power budget of an edge device — with a fraction of the peak power draw of competing hardware.
Today's architecture wastes compute.
AI systems typically run on GPUs that require high power consumption and immense electric budgets. The industry is alleviating some of this by making models sparse (reducing redundant data) and quantized or compacted (lowest-precision encodings) — BitNet, Hamiltonian Net (HNet), sparse transformers, FP4, EfficientNet, and more.
GPUs were designed as screen-pixel (graphics) processors and adapted for AI; they don't fit the characteristics of evolving AI software. Non-Von's novo architecture was designed for AI from the ground up — its native language is AI. The diagram below shows the difference in computational steps between a GPU/TPU and the novo architecture (and doesn't even include the extra memory-processor steps that a GPU requires).
From classic ML to state-of-the-art transformers.
Non-Von chips specialize in sparse, quantized AI systems, taking maximum advantage of the design trends spreading through the industry. As models move from state-of-the-art transformers toward sparse models (BitNet, EfficientNet) and quantization (FP4), they converge on exactly the systems Non-Von was designed to run optimally. Our advantage grows as these trends continue.
Unstructured sparsity, natively.
Today's GPUs and TPUs require structured sparsity — models must be pruned in rigid row/column patterns. But models naturally produce unstructured sparsity, with irrelevant values scattered randomly throughout the matrix. Engineers are therefore severely constrained: structured-sparsity requirements leave significant efficiency gains on the table.
Non-Von's novo architecture makes it possible to process unstructured models directly, letting engineers leverage any kind of sparsity — dramatically enhancing the efficiency gains available through this architecture.
Engineers must convert to structured sparsity today — novo processes any kind of sparsity.
Bring your own model.
Non-Von can take any trained model and automatically implement it as a sparse, compacted system on silicon. This includes all common development packages — PyTorch, ONNX, Keras, TensorFlow, SKLearn, NumPy, and more. Results can be printed as custom Non-Von silicon or imprinted onto our mass-produced programmable AI accelerator boards.
We place paramount importance on a powerful, well-supported API, and are preparing pre-loaded models for common audio and video use cases. The outcome: up to 40x better power efficiency on tasks from visual recognition to transformer-based chatbots (Hokenmaier et al., 2024).
Real results.
Non-Von's novo architecture addresses significant bottlenecks in the AI inference industry — enabling data-center models to move to edge devices, and the data center itself to become more efficient.
Dramatic model compression.
More power efficient.
and more cost efficient
- $50Non-Von novo2
- $130Hailo 10H
- $250NVIDIA Jetson Orin Nano
- $250BrainChip Akida
More cost efficient.
and easy to integrate
- Robust SDK and compiler
- No NVIDIA CUDA moat
- Pre-existing models for popular use cases
Easy to integrate.
The SCULPT toolset
Under the hood, Non-Von's ecosystem automatically sculpts a customer's model for optimization on our hardware. We rewrite the model to take maximal advantage of Non-Von hardware properties. Our Sparse Compact Ultra-Low Power Toolset (SCULPT) applies to existing models in Python, ONNX, Keras, TensorFlow, SKLearn, NumPy, and more — with just a few lines of code. SCULPTing yields large gains when implemented on Non-Von hardware.
By contrast, GPUs and other standard von-Neumann architectures literally impede efficient code execution due to hardware requirements, greatly adding to the power cost of large AI systems. Non-Von's SCULPT environment enables AI designs that immediately run efficiently, with enormous cost savings.
Our origin
For years our founders have been creating innovative (and sparse) AI models. They recognized that today's hardware would not take advantage of the efficiencies they had built into the software — so they developed the technology that would fully leverage AI systems like these. That technology became the basis of Non-Von.
Today the whole industry is chasing efficiency — sparsity (Neural Magic, Cerebras), compact/quantized low-precision models (Nvidia's FP4, Microsoft's BitNet), and software innovations like DeepSeek. Non-Von builds its company and architecture from the ground up to be the native hardware for AI — accelerating most highly-used AI applications while hugely reducing the power budget, from low-power IoT devices to full-scale server farms.
From silicon to system.
